Center for Digital and Analog Integrated Systems

Biblio

Found 156 results
Filters: Author is Sung-Mo Kang  [Clear All Filters]
2011
S. Shin, K. Kim, and S. - M. Kang, “Reconfigurable Stateful NOR Gate for Large-Scale Logic Array Integrations”, IEEE Transactions on Circuits and Systems II, vol. 58, pp. 442–446, 2011.
K. Kim, S. Shin, and S. - M. Kang, “Stateful Logic Pipeline Architecture”, in IEEE International Symposium on Circuits and Systems (ISCAS), 2011, pp. 2497–2500.
2010
S. Shin, K. Kim, and S. - M. Kang, “Compact Models for Memristors”, in 2nd Memristor and Memristive Systems Symposium, 2010.
S. Shin, K. Kim, and S. - M. Kang, “Compact Models for Memristors Based on Charge-Flux Constitutive Relationships”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 29, pp. 590–598, 2010.
S. Shin, K. Kim, and S. - M. Kang, “Data-Dependent Statistical Memory Model for Passive Array of Memristive Devices”, IEEE Transactions on Circuits and Systems II, vol. 57, pp. 986–990, 2010.
J. - H. Park, S. Shin, J. Christofferson, A. Shakouri, and S. - M. Kang, “Experimental Validation of the Power Blurring Method”, in Semiconductor Thermal Measurement, Modeling, and Management Symposium (Semi-Therm 26), 2010, pp. 240–244.
Y.  H. Tseng, S.  S. Chung, S. Shin, S. - M. Kang, H.  Y. Lee, and M.  J. Tsai, “A New Tunneling Barrier Width Model of the Switching Mechanism in Hafnium Oxide-Based Resistive Random Access Memory”, in International Conference on Solid State Devices and Materials (SSDM), 2010, pp. 1108–1109.
K. - H. Jo, C. - M. Jeong, K. - S. Min, and S. - M. Kang, “Self-adaptive write circuit for low-power and variation-tolerant memristors”, IEEE Transactions on Nanotechnology, vol. 9, pp. 675–678, 2010.
K. - H. Jo, S. Shin, K. - S. Min, and S. - M. Kang, “Variation-adaptive Write Circuit for Low-power Memristive Memories”, in 2nd Memristor and Memristive Systems Symposium, 2010.
2009
K. - H. Jo, J. - H. Bong, K. - S. Min, and S. - M. Kang, “A compact Verilog-A model for Multi-Level-Cell Phase-change RAMs”, IEICE Electronics Express, vol. 6, pp. 1414–1420, 2009.
J. - H. Park, A. Shakouri, and S. - M. Kang, “Fast Thermal Analysis of Vertically Integrated Circuits (3D ICs) Using Power Blurring Method”, in InterPACK, 2009, pp. 701–707.
J. Hu, Y. Liu, C.  Z. Ning, R. Dutton, and S. - M. Kang, “Fringing field effects in semiconductor nanowire double heterostructures”, in Proceedings of the SPIE, 2009, p. 72110Q.
S. Shin, K. Kim, and S. - M. Kang, “Memristor-Based Fine Resolution Programmable Resistance and Its Applications”, in International Conference on Communications, Circuits and Systems (ICCCAS), 2009, pp. 948–951.
J. - H. Bong, Y. - J. Kwon, K. - S. Min, and S. - M. Kang, “New word-line driving scheme for suppressing oxide-tunneling leakage in sub-65-nm SRAMs”, in International Symposium on Quality Electronic Design (ISQED), 2009, pp. 459–464.
2008
S. Shin et al., “0.18um CMOS Integrated Chipset for 5.8GHz DSRC Systems with +10dBm Output Power”, in IEEE International Symposium on Circuits and Systems (ISCAS), 2008, pp. 1958–1961.
J. Jung, K. - H. Baek, S. - I. Lim, S. Kim, and S. - M. Kang, “A 6 bit 1.25 Gsamples/s DAC for a WPAN”, in IEEE International Symposium on Circuits and Systems (ISCAS), 2008, pp. 2262–2265.
Y. S. Kim and S. - M. Kang, “A 8-Gb/s/pin Current Mode Multi-Level Simultaneous Bidirectional I/O”, in IEEE International Symposium on Circuits and Systems (ISCAS), 2008, pp. 3069–3072.
J. - H. Park, X. Wang, A. Shakouri, and S. - M. Kang, “Fast Calculation of Temperature Profiles of IC Chips with High Spatial Resolution”, in Semiconductor Thermal Measurement, Modeling, and Management Symp. (Semi-Therm 24), 2008, pp. 51–55.
J. - H. Park, A. Shakouri, and S. - M. Kang, “Fast Evaluation Method for Transient Hot Spots in VLSI ICs in Packages”, in International Symposium on Quality Electronic Design (ISQED), 2008, pp. 600–603.
J. Hu, Y. Liu, C.  Z. Ning, R. Dutton, and S. - M. Kang, “Fringing field effects on electrical resistivity of semiconductor nanowire-metal contacts,”, Applied Physics Letters, vol. 92, p. 083503, 2008.
K. Maize, X. Wang, J. - H. Park, J. Christofferson, S. - M. Kang, and A. Shakouri, “High Speed Transient Thermal Characterization and Simulation of Integrated Circuits”, in International Symposium on Thermal Design and Thermophysical Property for Electronics, 2008.
2007
A. B. Kahng, S. - M. Kang, W. Li, and B. Liu, “Analytical Thermal Placement for VLSI Lifetime Improvement and Minimum Performance Variatio”, in International Conference on Computer Design (ICCD), 2007.
J. - H. Park, A. Shakouri, and S. - M. Kang, “Fast Evaluation of Transient Hot Spots in VLSI Chip Packages”, in IMAPS Advanced Technology Workshop (ATW) on Thermal Management, 2007, pp. 24–27.
S. Shin, K. Kim, K. Lee, and S. - M. Kang, “Fast Frequency Offset Cancellation Loop using Low-IF Receiver and Fractional-N PLL”, IEEE Transactions on Circuits and Systems II, vol. 54, pp. 272–276, 2007.
V. M. Heriz, J. - H. Park, A. Shakouri, and S. - M. Kang, “Method of Images for the Fast Calculation of Temperature Distributions in Packaged VLSI Chips”, in 13th Int. Workshop on Thermal Investigations of ICs (THERMINIC), 2007, pp. 17–19.

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