Center for Digital and Analog Integrated Systems

Biblio

Found 4 results
Filters: Author is Kwan-Hee Jo  [Clear All Filters]
2011
J. - H. Bong, K. - H. Jo, K. - S. Min, and S. - M. Kang, “Oxide-Tunneling Leakage Suppressed SRAM for Sub-65-nm Very Large Scale Integrated Circuits”, Journal of Low Power Electronics, vol. 7, pp. 87–95, 2011.
2010
K. - H. Jo, C. - M. Jeong, K. - S. Min, and S. - M. Kang, “Self-adaptive write circuit for low-power and variation-tolerant memristors”, IEEE Transactions on Nanotechnology, vol. 9, pp. 675–678, 2010.
K. - H. Jo, S. Shin, K. - S. Min, and S. - M. Kang, “Variation-adaptive Write Circuit for Low-power Memristive Memories”, in 2nd Memristor and Memristive Systems Symposium, 2010.
2009
K. - H. Jo, J. - H. Bong, K. - S. Min, and S. - M. Kang, “A compact Verilog-A model for Multi-Level-Cell Phase-change RAMs”, IEICE Electronics Express, vol. 6, pp. 1414–1420, 2009.