Center for Digital and Analog Integrated Systems

Biblio

Found 5 results
Filters: Author is G. Yang  [Clear All Filters]
2006
G. Yang, Z. Wang, and S. - M. Kang, “Gate Leakage Tolerant Circuits In Deep Sub-100nm CMOS Technologies”, Smart Materials and Structures, vol. 15, pp. S21–S28, 2006.
2005
G. Yang, S.  O. Jung, K.  H. Baek, S.  H. Kim, S. Kim, and S.  - M. Kang, “A 32-Bit Carry Lookahead Adder Using Dual-Path All-N Logic”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 13, pp. 992–996, 2005.
2004
G. Yang, Z. Wang, and S. - M. Kang, “Leakage-proof Domino Circuit Design for Deep Sub-100nm Technologies”, in International Conference on VLSI Design, 2004, pp. 222–227.
G. Yang, Z. Wang, and S. - M. Kang, “Low Power and High Performance Circuit Techniques for High Fan-in Dynamic Gates”, in International Symposium on Quality Electronic Design (ISQED), 2004, pp. 421–424.
G. Yang, S. - O. Jung, K. - H. Baek, S.  H. Kim, S. Kim, and S. - M. Kang, “A Low-Power 1.85 GHz 32-bit Carry Lookahead Adder Using Dual Path All-N-Logic”, in IEEE International Symposium on Circuits and Systems (ISCAS), 2004, pp. 781–784.