Center for Digital and Analog Integrated Systems

Biblio

Found 6 results
Filters: Author is P. Bendix  [Clear All Filters]
2004
J. Lee, Y. Huh, P. Bendix, and S. - M. Kang, “Design of ESD power protection with diode structures for mixed-power supply systems”, IEEE Journal of Solid-State Circuits, vol. 39, pp. 260–264, 2004.
2003
J. Lee, K. - W. Kim, Y. Huh, P. Bendix, and S. - M. Kang, “Chip-Level Charged-Device Modeling and Simulation in CMOS Integrated Circuits”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, pp. 67–81, 2003.
2001
J. Lee, Y. Huh, P. Bendix, and S. - M. Kang, “Design-for-ESD-Reliability in High-Frequency I/O Interfaces in Deep-Submicron CMOS Technology”, in IEEE International Symposium on Circuits and Systems (ISCAS), 2001, pp. 746–749.
Q. Li, Y.  J. Huh, J.  W. Chen, P. Bendix, and S. - M. Kang, “ESD Design Rule Checker”, in IEEE International Symposium on Circuits and Systems (ISCAS), 2001, pp. 499–502.
Q. Li, Y.  J. Huh, J.  W. Chen, P. Bendix, and S. - M. Kang, “Full Chip ESD Design Rule Checking”, in IEEE International Symposium on Circuits and Systems (ISCAS), 2001, pp. 503–506.
2000
J.  S. Lee, Y.  J. Huh, P. Bendix, and S. - M. Kang, “Chip-Level Simulation for CDM Failures in Multi-Power ICs”, in EOS/ESD Symposium, 2000.