Center for Digital and Analog Integrated Systems

Biblio

Found 6 results
Filters: Author is Seong-Ook Jung  [Clear All Filters]
2003
S. - O. Jung, K. Kim, and S. - M. Kang, “Timing Constraints for Domino Logic Gates with Timing-Dependent Keepers”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, pp. 96–104, 2003.
2002
S. - O. Jung, K. - W. Kim, and S. - M. Kang, “Dual Threshold Voltage Domino Logic Synthesis with Noise and Power Constraint”, in Design, Automation and Test in Europe (DATE), 2002, pp. 260–265.
S. - O. Jung and S. - M. Kang, “High Performance Dynamic Logic Incorporating Gate Voltage Controlled Keeper Structure for Wide Fan-In Gate”, IET Electronics Letters, vol. 38, pp. 852–853, 2002.
G. Yang, S. - O. Jung, S. H. Kim, and S. - M. Kang, “A Low-Power 2.1 GHz 32-bit Carry Lookahead Adder Using Dual Path All-N-Logic”, in IEEE International Midwest Symposium on Circuits and Systems, 2002, pp. 298–301.
S. - O. Jung, K. - W. Kim, and S. - M. Kang, “Low-Swing Clock Domino Logic Incorporating Dual Supply and Dual Threshold Voltages”, in ACM/IEEE Design Automation Conference, 2002, pp. 467–472.
2001
K. - W. Kim, S. - O. Jung, P. Saxena, C. L. Liu, and S. - M. Kang, “Coupling Delay Optimization by Temporal Decorrelation using Dual Threshold Voltage Technique”, in IEEE Design Automation Conference(DAC), 2001, pp. 732–737.