Biblio

Found 9 results
Filters: Author is C. Kim  [Clear All Filters]
2003
C. Kim, K.  W. Kim, and S. - M. Kang, Energy Efficient Skewed Static Logic Design with Dual Vt, IEEE Transactions on VLSI, vol. 11, pp. 64–70, 2003.
2001
C. Kim, K.  W. Kim, and S. - M. Kang, Energy Efficient Skewed Static Logic Design with Dual Vt, in IEEE International Symposium on Circuits and Systems (ISCAS), 2001, pp. 882–885.
C. Kim and S. - M. Kang, A Low-Power Reduced Swing Single Clock Flip-Flop, in IEEE International Symposium on Circuits and Systems (ISCAS), 2001, pp. 806–809.
C. Kim and S. - M. Kang, A Low-Swing Clock Double-Edge Triggered Flip-Flop, in IEEE International Symposium on VLSI, 2001, pp. 183–186.
2000
C. Kim, J. Lee, K.  H. Baek, E. Martina, and S. - M. Kang, High-Performance, Low-Power, Skewed Static Logic in Very Deep-Submicron (VDSM) Technology, in IEEE International Conference on Computer Design, 2000, pp. 59–64.
C. Kim, S.  M. Yoo, and S. - M. Kang, Low Power Adiabatic Computing with NMOS Energy Recovery Logic, Electronics Letters, vol. 36, pp. 1349–1350, 2000.
C. Kim, J. Lee, K.  H. Baek, and S. - M. Kang, Low-Power Skewed Static Logic with Topology-dependent Dual Vt, in 13th Annual IEEE International ASIC/SOC Conference, 2000, pp. 310–314.
S.  M. Yoo, C. Kim, S.  O. Jung, K.  H. Baek, and S. - M. Kang, New Current Sense Amplifier for High Density DRAMs and PIM Architecture, in SEMICON West, 2000, p. Poster.
C. Kim, S.  O. Jung, K.  H. Baek, and S. - M. Kang, Parallel Dynamic Logic (PDL) and Speed-Enhanced Skewed Static (SSS) Logic, in IEEE International Symposium on Circuits and Systems (ISCAS), 2000, pp. 756–759.